Memory Model Glossary
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- Completeness Assumption
- When a load l being executed by a processor p=p(l) completes, it has been performed with respect to all processors.
- Monotonicity Assumption
- If the storage access s associated with a load x instruction executed by processor pi is resolved to index m (in the sequence of stores to x), and s is completed wrt processor pj, then every load or store of x by pj after this completion event at pj will access the sequence of stores at x at an index n >= m.
- Performs Assumption
- For any location x and processor p the set of all storage accesses to x performed at p are totally ordered, in non-decreasing order of the index associated with the access.
- Weak Performs Assumption
- For any location x and processor p the set of all storage accesses to x performed at p are ordered such that the index of any two accesses is non-decreasing if at least one of the accesses is local (that is, issued by processor p).
- Consider n processors each executing a code sequence Si of loads and store against a common shared memory. Their exeution is said to be sequentially consistent if it can be thought of as arising as follows. Imagine the processors are connected to memory by a switch. At any given instant the switch is pointing to one processor. A processor can take one step (load or store) to completion. Then the switch setting changes, and it may point to another processor (or not). Once a processor has completed all its steps, the switch may no longer point ot it. In this way each processor completes its instructions, performing one step at a time.
- Mathematically, a sequentially consistent execution can be thought of just taking the code sequences and merging them into one sequence (preserving the order of steps in each sequence).
- A load of a variable is totally ordered wrt the stores to that variable.
- (a) Writes to a single location are totally ordered (b) A load returns the last value for the variable seen by the processor.
- (a) Causality: if p2 sees p1's write, and p3 sees p2's write, p3 sees p1's write. (b) Local acyclicity: Each thread sees an acyclic order of events that is consistent with program order.
- If a happens before b, and b before c, then a happens before c.

